This is a modification of SB3 clock to sync to D1V3 on board super clock 11.2896MHz XO.
- Major improvement on D1V3 is to use a clean super clock for SM5842AP.
- Major problem is to connect the D1V3 super clock back to SB3. Thus SB3 internal modifications are needed. SMA coaxial cable is connected to pin 9 of HCU04 IC and ground.
- A separate 3.3V AMS1117 regulator is used for the CPLD and HCU04 ICs. Sanyo OS-con and film cap are used for supply bypass.
- A linear 5V 1.5A regulator is used to replace the original switching adapter.
With this modification, the SB3 will not be able to play back other sampling frequencies file other than 44.1kHz! Thus it is only good for CD playback now.
Some measurements:
SB3 SPDIF digital out FFT @ 1kHz
SB3 SPDIF digital out FFT @ 18kHz
D1V3 and SB3 FFT @ 1kHz (D1V3 analogy output)
D1V3 and SB3 FFT @ 18kHz (D1V3 analogy output)